An integrated circuit often uses a communication bus to route groups of signals between different parts of the integrated circuit. The bus comprises several signal lines made of a low-impedance conductor, typically metal, and couples to a plurality of circuits for either receiving signals therefrom or providing signals thereto. Buses are used in microprocessor integrated circuits to internally route address and data signals between blocks. For example, in response to an instruction, a microprocessor data register couples its contents onto a data bus and the data is received from the bus by an arithmetic logic unit.
In order to optimize the speed of the integrated circuit, it is generally necessary to preset or precharge the voltage level on the bus prior to the data transfer. Typically, each bus line is precharged to a logic high. Then when the data is transferred, each driver circuit connected to a bus line either maintains the precharged level of the bus line if the logic level to be provided is a logic high, or discharges the bus line if the logic level to be provided is a logic low. Therefore, the time it takes to discharge the bus line determines the speed. Furthermore, a control signal must be provided to enable a corresponding driver circuit so that the driver circuit can provide the voltage level on the bus line only at desired times.
The nature of a precharged bus creates limitations in the speed in which the driver circuit provides its data bit to a bus line. Because a bus routes groups of signals to different blocks which may be located on different sides of the integrated circuit, each bus line is relatively long and therefore may be modeled as a transmission line with a large distributed capacitance. In order for the driver circuit to discharge the bus quickly, the transistors in the driver circuit must also be large. However, the capacitance which the transistors add to the bus lines to which they are connected, and the capacitance which the transistors add to the data and control signals received on their gates, are both proportional to transistor size. Thus, for a particular driver circuit, the improvement in speed due to an increase in transistor size to discharge the bus faster, eventually equals the decrease in speed due to the increased capacitance added to the bus line and to the data and control signals. Therefore, no further improvement in speed is provided.